Build Discrete 555 Timer Using Transistor Diy

Table of Contents

Build discrete homemade 555 timer using Transistor diy, such as NE555, TLC555, NA555, SA555, etc. Include PCB Gerber. Overview The 555 timer is an 8-pin timing integrated circuit, released around 1971. It got its name because the voltage reference network in its design is made up of three 5K resistors. At that time, it was the only very fast and commercial chip, with many excellent qualities such as small size, light weight, stability, reliability, wide operating power supply range, strong output terminal current supply capability, high timing accuracy, good temperature stability, and cheap price.

1. Project Introduction

1.1 Overview

It was deeply loved by engineers and enthusiasts, and many applications of 555 were designed, as well as some books published. In the history of integrated chip development, its significance is extraordinary. Currently, we can see different 555 timer chips with different names such as NE555, TLC555, NA555, SA555, etc., introduced by different manufacturers. Now, let’s DIY our own chip based on the internal structure of the 555. I named it LC555.

Figure 1-1 Schematic Diagram Of The Lc555 Chip

1.2 Design features:

Built with discrete components, allowing for in-depth study of circuits.
Uses straight-insert components, making it easy for beginners to solder and debug.
Equipped with on-board banana plug and pin interfaces, facilitating debugging and expansion.

2. Overall Design Plan

2.1 Structural Diagram

According to the 555 data manual provided by the manufacturer, the internal structural diagram shown in the figure below is found. As can be seen from the figure, the 555 timer is composed of a resistor voltage divider circuit, two comparator circuits, a trigger circuit, and a reverse output driver circuit. The following text will analyze each circuit one by one.

Figure 2-1 Internal Structure Diagram Of 555 Chip

2.2 Pin Description 2.2

PIN	Name	Function description
1	GND	Ground
2	TRIG	Start of timing input. TRIG < ½ CONT sets output high and discharge open
3	OUT	High current timer output signal
4	RST	Active low reset input forces output and discharge low.
5	CTRL	Controls comparator thresholds, Outputs 2/3 VCC, allows bypass capacitor connection
6	THR	End of timing input. THRES > CONT sets output low and discharge low
7	DIS	Open collector output to discharge timing capacitor
8	VCC	Input supply voltage, 4.5 V to 16 V. (SE555 maximum is 18 V)

3. Circuit Principles

The circuit for making a 555 timer consists of a voltage divider circuit, a threshold comparator circuit, a trigger comparator circuit, a flip-flop circuit, an output circuit, and a reset and discharge circuit. The following text will analyze each part separately, ultimately completing the circuit design of the chip.

3.1 Resistor voltage divider circuit

The VCC power supply is divided by three 5K resistors to provide 1/3VCC and 2/3VCC voltages to two comparators respectively. Since 5KΩ resistors are not commonly available and there may be manufacturing errors in resistors, two 10KΩ resistors can be connected in parallel to obtain a more stable 5KΩ resistor. The circuit design is as shown below:

Figure 3-1 Resistance Division Voltage Circuit (555 Chip Naming Origin)

3.2 “Threshold” Comparator Circuit Analysis

The first comparator circuit is analyzed because the reverse input terminal of the comparator is fixedly connected to 2/3VCC through a resistor divider. By comparing with the voltage of the forward input, the comparison result can be obtained. When the forward input voltage is greater than 2/3VCC, the comparator outputs a high level (VCC), otherwise it outputs a low level (0V).

Threshold Comparative Device Circuit — Figure 3-2 “Threshold” Comparative Device Circuit

It should be noted that the fifth pin of the 555 chip is the control pin, which can be used to adjust the threshold voltage by inputting external voltage according to the actual measurement situation. If no adjustment is needed, a 10nF capacitor can be connected to ground to eliminate interference and improve stability. This comparator circuit is composed of the first stage differential amplifier circuit and the second stage differential amplifier circuit with current mirror. The first stage circuit is a single-ended input and differential output differential amplifier composed of Q1, Q4, Q6, Q8, and R3. The second stage is a differential amplifier with double-ended input and single-ended output composed of Q2, Q3, Q5, Q7, R1, R2, and R4. The overall circuit composition is as shown in the diagram below:

Figure 3-3 Differential Amplifier Circuit

3.2.1 First-stage differential amplifier

(1) Darlington transistor in the first-stage differential amplification circuit,

Q1/Q4, Q6/Q8 use the Darlington structure to form a Darlington transistor. The Darlington transistor, also known as a composite transistor, uses a composite connection method to connect the collector of two or more transistors together, with the emitter of the first transistor directly coupled to the base of the second transistor, and so on, ultimately leading to the B, C, and E three electrodes. This Darlington transistor has the advantages of high gain, fast switching speed, and good stability. When used, the Darlington transistor can be directly viewed as a high-performance transistor with a high current amplification factor. If the gain of a single transistor is 10, then the gain of a Darlington transistor composed of 2 transistors will reach 10×10=100 times. With the increase in the number of transistors, the Vbe conduction voltage of the Darlington transistor will also increase.

Figure 3-4 Darlington Tube Circuit — Figure 3-4 Darlington Transistor Circuit

(2) Circuit analysis

Simplify and organize the circuit here for circuit analysis. The input terminal Ui1 of Q1 is the sixth pin of the chip, and the input terminal Ui2 of Q2 is a fixed 2/3VCC voltage value, with the current Ie=Ic1+Ic2. When the input voltage Ui1=Ui2=2/3VCC at pin 6, it is equivalent to inputting a pair of equally sized, in-phase common-mode voltages. Because the circuit is completely symmetrical, the ground voltage of the two transistor collector electrodes Uc1=Uc2, at this time the output voltage Uo of the differential amplifier is Uc1-Uc2=0, indicating that the differential amplifier does not amplify the common-mode signal. When the input voltage at pin 6 is greater than 2/3VCC, i.e. Ui1>Ui2, due to the symmetry of the circuit, the current of Ic1 will be greater than the current of Ic2, thereby increasing the voltage on the Rc1 load; when the input voltage at pin 6 is less than 2/3VCC, i.e. Ui1

Figure 3-5 The First-Stage Differential Amplifier Circuit.

The role of resistor Re in the circuit is to maintain the suppression of zero-point drift of the transistor differential amplifier circuit and further ensure the balance of the circuit in case of external factors. When the temperature rises, the collector current of the transistor also increases, causing Ie to increase, URe potential to increase. Since Ui1 and Ui2 potentials are fixed values, the Vbe voltage inside the transistor will decrease to balance the change in URe, thereby keeping Ie constant. In the actual circuit, a Darlington pair structure composed of two transistors is used. To ensure the normal operation of the circuit, the input voltage should be greater than 1.4V, which is twice the Vbe.

3.2.2 Second-stage differential amplifier

(1) Current mirror structure

The current mirror structure is used in the second-stage differential amplifier, which is commonly used to generate bias currents and active loads. It is also widely used to replicate or multiply current signals, and complementary polarity current mirrors can also achieve the conversion of differential to single-ended current signals. From the perspective of the controlled source, the current mirror can also be seen as a current-controlled current source device.

Figure 3-6 Current Mirror Structure Circuit

Through this circuit, we can briefly understand the working principle of the current mirror. The base and collector of transistor Q1 are connected together, so Q1 is actually similar to a diode, with a Uec voltage drop of 0.7V. Since Q1 and Q2 share a common power supply VCC, and their characteristics are consistent, Ib1=Ib2. Since Ie≈Ic=βIb, Ic1=Ic2, when the current of Q1 changes, Q2 also changes accordingly. This situation belongs to the ideal state. In actual application processes, due to inconsistent transistor performance and changes in Ube voltage, the amplification factor will also change. This characteristic is known as the Early effect. To solve this error effect and ensure the consistency of the output current of the current mirror, a Wilson current mirror can be used for optimization, improving the effect of the transistor’s conduction voltage. This article does not elaborate on this, readers can search for relevant information on their own.

(2) Circuit analysis

Two current mirror structures are used here, consisting of R1, R2, Q2, Q3, and R2, R4, Q5, Q7 respectively. This circuit may seem familiar yet somewhat unfamiliar. In fact, just by looking at this circuit upside down, it can be seen that it is actually a differential amplifier with a current mirror structure. This structure can amplify the differential signal in the front, increase the overall gain, and also maintain the balance of the output current. The common resistor R2 can be set to a smaller value to improve the amplifier’s load capacity.

Figure 3-6 Two -Level Differential Amplification Circuit

3.2.3 Circuit Simulation

After the disassembly and analysis of the first-level comparator circuit, the circuit was drawn in the EASYEDA simulation mode to perform analog verification. The VCC power supply is powered by a 6V DC source, with a 2/3 VCC voltage of 4V, and a 4V DC voltage source is used instead at the reverse input terminal. When the positive input terminal is connected to +6V, the comparator output is high because the positive voltage is greater than the reverse input voltage, with a multimeter reading of 5.945V according to the diagram, which meets the design requirements. Similarly, when the positive input terminal is connected to ground (GND), the comparator output is low because 0V is less than 4V, and the multimeter reading is 0.529V, meeting the design requirements of the comparator.

Figure 3-8 &Quot;Threshold&Quot; Comparator Simulation Circuit — Figure 3-8 “Threshold” Comparator Simulation Circuit

3.3 Trigger Comparator Circuit

3.3.1 Circuit Principle

This level of comparator circuit is similar to the first differential amplification circuit in the previous level, using NPN transistors in the front and PNP transistors here. Q9 and Q10, Q12 and Q13 respectively form a Darlington structure. The base of Q9 is connected to the second pin of the chip, and the base of Q13 is a fixed 1/3VCC input for differential input. The reason for using different types of transistors is to make the common mode voltage of the input be 0. This differential circuit is a differential input, single-ended output method. In this output method, only the output variation of Q9 and Q10 in the differential amplification circuit is obtained, and the output variation of Q12 and Q13 is not utilized, so the voltage gain of the amplifier in this situation is half of the differential output. Looking at the input signal entering the base of Q9 and the output signal exiting the collector of Q10, they belong to the same Darlington structure, so the phase of the output signal is opposite to the input signal. When the external trigger pin input voltage is less than 1/3VCC, the conduction capability of Q9 and Q10 is greater, and the current flowing through is also larger, so the comparator output is high. When the trigger pin is higher than 1/3VCC, most of the current will flow through Q12 and Q13, resulting in a lower comparator output voltage.

Q11 and R12 form an NPN transistor switch circuit, providing enough operating current to the differential circuit, while the base current of Q11 is supplied by the current mirror structure composed of Q15 and Q18. This circuit can greatly increase the gain of the amplifier, so there is no need to add another stage of amplification circuit like the first comparator.

3.3.2 Circuit Simulation

After analyzing the second-stage comparator circuit, a simplified circuit is drawn in the EASYEDA simulation mode for simulation verification. The VCC power supply is powered by a 6V DC source, with 1/3VCC voltage at 2V, and a 2V DC voltage source is used instead of the positive input terminal. When the reverse input terminal is connected to +6V, the comparator output is low because the forward voltage is less than the reverse input voltage, according to the multimeter reading of 2.739uV in the figure, which meets the design requirements; similarly, when the reverse input terminal is connected to GND, the comparator output is high because 0V is less than 2V, and the multimeter reading is 5.982V, meeting the comparator design requirements.

Figure 3-10 Trigger Comparator Simulation Circuit

Figure 3-10 Trigger Comparator Simulation Circuit 1

3.4 RS Trigger

3.4.1 Circuit Analysis

When R=0, S=1, Q14 conducts, Q17 cuts off, Q18 cuts off, the current flowing through R13 passes through Q16 and Q19 to the ground, Q19 conducts, OUTPUT output is grounded at 0 level, flip level is 1; when R=1, S=0, Q17 conducts, pulling down the base of Q19, Q19 cuts off, the current flowing through R13 passes through Q16 and Q17 to the ground, Q18 conducts, Q19 collector is at a high level, that is, OUTPUT is 1, flip level is 0; when S=1, R=1, Q14 conducts, its Uce voltage is very small, so Q17 cannot conduct, at this time Q19 conducts, OUTPUT output is grounded at 0 level, flip level is 1. If the initial state is R=1, S=0, then Q17 and Q18 conduct. After that, R and S change to low level input, that is, R=0, S=0, at this time Q14 and Q17 should be cut off, but because Q18 has conducted initially, the power supply current passes through R14 to the base of Q17, causing Q17 to continue to conduct, so the OUTPUT still outputs 1, and the flip level becomes 0; If the initial state is R=0, S=1, then Q14 and Q19 conduct. After that, R and S change to low level input, that is, R=0, S=0, at this time Q14 is still cut off, since R is still 0, Q19 remains in a conducting state, OUTPUT output remains at a low level unchanged, flip level is 1.

When the external reset signal RESET is at a high level, it has no effect on the circuit. However, when the RESET signal is at a low level, Q16 is cut off, Q18 conducts, the OUTPUT output is at a high level, the flip level is 0, and is unrelated to other pins. This also explains why the 4-pin reset pin in the application circuit needs to be connected to the VCC power supply, as if it is connected to ground, the output signal will directly be at a low level.

3.4.2 Circuit simulation

Circuit simulation is carried out in the EASYEDA to verify the RS trigger circuit, with the reset pin left floating. The VCC power supply is provided by a 6V DC power supply, connected to the R and S terminals of the trigger with VCC and GND, and the output is viewed with a multimeter. The simulation diagram is as follows:

Figure 3-13 Rs Trigger Simulation Circuit

3.5 output circuit

3.5.1 output circuit

The output of the RS flip-flop is connected to the base of Q20, forming a simple transistor switch circuit with R15 and R16. When the input level of the base is high or low, the circuit is analyzed.

(1) The base input of Q20 is at a low level.

When the INPUT input is at a low level, Q20 is cut off, the collector is at a high level, Q21 and Q25 are turned on, Q21 and Q25 form a Darlington structure, at this time the output voltage is VCC minus the voltage drop of two diodes, and pin 3 of the chip outputs a high level. Since Q20 is cut off, its emitter is at a low level, Q24 and Q26 are also cut off accordingly.

(2) The base level input for Q20 is high.

When the INPUT is at a high level, Q20 conducts. The base voltage of Q21 is approximately the voltage drop of one diode, which is not enough to turn on Q21 and Q25, which form a Darlington structure. However, Q24 and Q26 will conduct when Q20 conducts. The emitter current of transistor Q20 is divided by R19 and R17 to provide conduction current to Q26 and Q24, causing both transistors to conduct simultaneously. The collector of Q26 is pulled low for output, and the collector of Q24 is pulled low for discharge, resulting in a low-level output at pin 3 of the chip.

The collector and base of transistor Q23 are connected together, acting as a diode. When the output is at a high level, it provides enough driving capability to the power supply. When Q25 conducts, the output voltage reaches the conduction voltage of Q22, which is the voltage drop of one diode. At this point, the current flows back to the base of Q21 through Q22, acting as a feedback circuit to enhance the output current.

3.5.2 Reset circuit

When the reset pin input of chip 4 is at a low level, transistor Q23 conducts, with the emitter current provided by the previous trigger, providing conduction for Q24 and Q26, causing the output of pin 3 and pin 7 of chip 3 to be grounded at a low level, achieving the reset function.

The role of R20 in the circuit is to protect Q23 from reverse breakdown. According to the data sheet, it is known that the emitter-base breakdown voltage of 2N3906 is only 5V, so when an external voltage exceeding 5V is provided, transistor Q23 is easily broken down, adding a 100K resistor can effectively protect the transistor.

3.5.3 Circuit Simulation

Verify the output circuit in EASYEDA. The VCC power supply is powered by a 6V DC power supply, with a 2K input resistor in series at the input terminal. Use a multimeter to measure the base voltage of Q21, the collector voltage (output voltage) of Q26, and the emitter voltage of Q20. The high- and low-level inputs at the input terminal are simulated by the VCC and GND networks. The simulation diagram is shown below:

4 simulation diagram IV.

4.1 design New project

Open EasyEDA, create a project and name it [Making Chips Together] Homemade 555 timer, name the schematic file: SCH-Homemade 555 timer. Draw the circuit schematic according to the circuit in Figure 4-1.

Figure 4-1 Homemade 555 Timer Circuit Schematic Diagram

4-2 Component selection

In the component selection of this project, the NPN type 2N3904 and PNP type 2N3906 transistors are used, with the two transistors being paired; resistors can be selected as 1/4W through-hole resistors, and the chip pins are led out with pin headers and banana plug interfaces for easy installation and testing. All components can be searched directly in the EASYEDA component library. If you are not familiar with the components, you can also search by copying the product number in the material list (each component has a unique product number in the EASYEDA online store). If there is a shortage of materials, other substitute materials can also be selected. Through the analysis of the above circuit, I believe that you, being smart, have some understanding of the functions of various components in the circuit. Therefore, changing individual materials will not affect the circuit’s performance. After understanding the working characteristics of the circuit, component selection becomes simpler.

Figure 4-3 Device Number Selection Explanation

5 – PCB design

After completing the schematic design, check that the circuit and network connections are correct, then click on Design – Schematic to PCB. This will generate a PCB design interface. You can temporarily ignore the pop-up border settings, then save the PCB file to the project file and name it: PCB-Homemade 555 Timer.

5-1 Border Design

Before drawing the PCB, the shape and size of the PCB border need to be determined based on personal design preferences and the space occupied by the components. If there are no special requirements for the enclosure, the border is generally designed as a rectangle, circle, or square. When designing this project, adhering to the principles of appropriateness and aesthetics, we set a rounded rectangle with a length of 90mm, width of 71mm, and corner radius of 2mm in the border setting options under the top tool menu bar. We also placed a semi-circle in the middle left position to simulate a notch in the chip, making it more vivid. The actual size of the board border will be adjusted during layout and routing. If it is too small, it can be enlarged appropriately, and if it is too large, the border can be reduced. The style and design can be freely played around with, but it is recommended to control it within 10cm*10cm so that you can get it printed.

5-2 PCB Layout

After drawing the outline of the board, the next step in PCB design is to classify and layout the components. Classification refers to categorizing various components according to the functional modules of the circuit schematic. There are many transistors and resistors in the diagram, but which transistor and resistor are connected together? This requires us to use the layout transfer function provided by JLCPCB EDA. First, make sure that the PCB project file is saved in a folder of the schematic file, then select a circuit module in the schematic, such as selecting the voltage divider circuit, then select the “Tools” option in the top menu bar – click on the “Layout Transfer” button. The components corresponding to the PCB page can be selected and placed according to the schematic layout. Use this method to classify each circuit module and place them in the border placed earlier. When laying out, pay attention to neatness, and follow the guidelines of the flying wire for placement.

According to the flow of signals in the schematic and the connection relationship of the devices, the devices can be placed neatly. During the layout process, pay attention to the interface positions, for example, we need to place the pin headers and banana plug interfaces according to the actual chip pins arranged on the top and bottom sides. The layout reference diagram is as follows:

5-3 PCB Wiring

Next step to PCB design: PCB wiring. Because one circuit board has two surfaces and ground surfaces, the PCB wiring can be divided into top -level wiring and underlying wiring. The top layer of the top line is red line by default, and the bottom layer is a blue line. In the circuit board, connect the wires according to the flying wire, and connect the point of the same network.

First, select the layer of the wiring in the element, and then click on the wire tool to connect, and the shortcut key is W. The seemingly simple continuous look, in fact, we need to be patiently adjusted. The placement of the component will also affect the difficulty of the wiring, so it is necessary to further adjust the layout during the wiring process and further optimize it. The layout is equivalent to paving the cushion for the wiring, the layout is complete, and the wiring is naturally smooth. Provide the following reference suggestions in the wiring of the project:

The next step in PCB design is PCB tracing. Since a circuit board has two sides – top side and bottom side, PCB tracing can be divided into top layer tracing and bottom layer tracing. The top layer tracing is default in red color, while the bottom layer is in blue color. Tracing is essentially connecting wires on the circuit board, linking points of the same network together.

First, select the layer and element where tracing is needed, then click on the wiring tool to connect them, shortcut key is W. Although tracing may seem simple, it requires patience and adjustments. The layout of components will also affect the difficulty of tracing, so further adjustments and optimizations are needed during the tracing process. The PCB layout introduced earlier is essentially laying the groundwork for tracing – once the layout is good, tracing will naturally flow smoothly. Below are some recommendations for tracing in this project:

The power lines (VCC+ and VCC-) are set to 35mil, and the signal lines are set to 20mil in width.
Routing should primarily be done on the top layer, but if a route is blocked, it can be switched to the bottom layer for connection.
When routing, prioritize straight lines, and use obtuse angles or arcs for turns.
Finally, add teardrops and silk screen markings to indicate the dimensions and interface functions of the PCB board.

The routing reference is shown in the figure below. For the initial design, you can follow the routing in the figure, or you can freely design your own 555 timer chip.

6. Welding and debugging

6-1 Hardware welding

After receiving the board and components, first check if there are any missing or omitted materials, and if there are no errors, proceed with welding. The principle of welding is to start low and then high. First, solder the resistors to the board, then solder the transistors, pin headers, and finally the banana jack interface. The welding method for plug-in components is as shown in the diagram below. Pay attention to aligning the positions during welding, check if the resistance values are correct, avoid affecting the circuit performance, and prevent the circuit from not working properly.

Figure 5-4 Plug-In Welding Schematic Diagram

6-2 Hardware Debugging

After completing the first step of welding, do not directly perform power testing, even if you are very excited and have successfully completed the component welding, do not be impatient. After welding, it is necessary to use a multimeter to check whether there is a short circuit between the power supply and ground, whether there are any short circuits or open circuits during the welding process, and only after confirming that there are no errors can you proceed with the power test. If there is no obvious heating of the components after powering on, then we can proceed to make a LED blinking circuit using a homemade 555 chip.