Downalod EDWinXP (Electronic Design for Windows) is a CAD CAE software package that cover all stages of electronic design process. , which include schematic capture, circuit simulation, PCB design and layout, generation of PCB manufacturing and testing documentation. It also provides the users with several verification and validation tools to check the integrity and correctness of the schematic and PCB layout design. One can use this suite to produce PCBs of several kinds including flexible PCBs, RF boards and multi-layer PCBs.
These task oriented modules are Schematics Editor, PCB Layout Editor, Fabrication Manager and Library Editor
EDWinXP – Features
Schematic Editor : Schematic Editor is the front end for any PCB design application. The function of this editor is to create a schematic diagram of the circuit. The created circuit is in the form of a logical diagram where components are placed using the Library Browser or Library Explorer. Analysis is an important part of any design process. EDWinXP provides two types of simulators one is Mixed Mode Simulator and other is EDSpice Simulator.
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Layout Editor : In EDWinXP,the design can be captured either in Schematic Editor or directly in Layout Editor. In the former case, the design is front annotated to the Layout Editor and in the latter case it is back annotated to Schematic Editor. EDWinXP also allows beginning layout without a pre-existing schematic. There are two board level Simulators in EDWinXP, Thermal Analyzer and Electromagnetic Analyzer. The Signal Integrity Analyzer examines the probable distortion of high-speed signals as they pass through traces on the PCB. The Field Analyzer is a tool for studying the electromagnetic fields that are created when power and/or signal traces on the board are energized. The concept of 3-Dimension has been incorporated into Layout Editor to get a 3D view of the designed board.
Fabrication Manager: The major fabrication tasks involved in PCB design are – Optional creation of Copper Planes and Copper Pour Areas, Adding dimensions and notes, Printing layout documentation drawings, Extracting NC-drill data to disk files or paper tape, Editing, Dimensioning and printing of drill templates, Editing and printing of layer artworks, Generation of artwork data files in Gerber ASCII format, Preview of artworks in Gerber ASCII files, Generation of disk files containing generic data for Pick & place machines, Generation of disk files containing bill of materials.
Library Manager : Library Browser is provided to browse library elements (Parts/ Symbols/ Packages/ Padstack) from the available libraries. These items in the searched list may be placed on the schematic/ layout by either of the two ways, Drag and Drop components or right click and send to Schematic or Layout. Library Explorer provides user with the list of libraries available at the system specified path. To add new components or to edit components supplied with EDWinXP Library Editor can be used.The concept of 3-Dimension which has been incorporated into Library Editor allows editing packages and cabinets. Tools have been provided to assist the user view the board and package from various directions and from different angles.
Integrated Structure of EDWinNET
EDWinNET has a totally integrated structure as shown in Fig.1.2. It features seamless integration between all its modules facilitating automatic front and back annotation.
The Schematic and Layout editors make use of the libraries which have shared part descriptions. Part description contains all information about layout view (package) and schematic view (symbols, packaging and pinout) of the component.
When we refer a part, it would extract the physical component assigned at the time of part creation. Some Parts do not contain the symbol information or sometimes the package information. Those parts, containing both symbols and package, will only take part in automatic front annotation to the layout and vice versa.
Components are added to the Schematic diagram from the library and are referred to as Parts; to complete the design we have to establish the connectivity between the components. The connections are created with the support of CONNECTIONS (in Schematic) and TRACES (in Layout) or NETS (in both Schematic and Layout).
The common netlist for schematics and layout is built, through packaging. When a component is packed in schematics, the component pin will get its equivalent pinout information in layout, and are stored as node information. The net consist of nodes and each node has its reference to the components pins both in schematics and layout.
Thus when component in schematics is packed, the layout pin equivalents are retrieved from information stored in part description. Every pin of packed schematics component is checked whether it is a node in some net, if it is a node then the node info is updated. Thus the corresponding package and pinout information’s are front annotated to the PCB layout editor and vice versa.
Structure of Project Database
All data about electronic design which may consist of several circuits and sub-circuits is stored in a single database, along with PCB layouts. All parts of the project design – schematics, PCB layout and PCB fabrication drawings and documents are simultaneously accessible by task oriented software modules of the system.
An individual project supports circuit with multiple hierarchical levels with multiple pages within a hierarchy. All hierarchies are loaded into memory and stored on disk in a single standard project (.EPB) file. All hierarchies share the local part and libraries. The project allows the user to create up to 99 hierarchies. Each hierarchy may consist of 1 to 99 pages of schematic diagram and a single PCB layout.
There is main hierarchy (MAINHIER) and all further hierarchical circuits that the user creates, are either under this main hierarchy or in equal priority level. The highest level contains a normal circuit, with the other hierarchies being used to capture subcircuits. If required, the designs which are reused can be saved as subcircuits. The circuit can be then referenced as a single component, the subcircuit instance.
Subcircuits can be of two types, hierarchical subcircuits and library subcircuits. Subcircuits may be nested within one another. Subcircuits allow hierarchical construction of designs by grouping the elements of a circuit into a macro. Circuits can be saved as a subcircuit in the subcircuit library and later may be adapted to a symbol.
While simulating the hierarchical subcircuit in Mixed Mode Simulator, the lower hierarchy subcircuit is flattened with upper hierarchy circuit. On other hand in EDSpice Simulator, the library subcircuits (.SBC files) are merged to the spice netlist file. And this entire circuit is simulated.
The fundamentals in designing the PCB are done in Layout Editor. Each hierarchy will have a separate Layout (PCB) associated with it. This means that the entire circuit for a single PCB must be created on the same hierarchy. Any circuit created on any other hierarchy will be created as a separate PCB for that hierarchy.
Integrated Project Database Principle
The integrated structure of the project is explained briefly. You can start with capture of the design in the form of Schematic Diagram. The initial stage will be to place on the schematic, the components, required in the circuit. Assume that one of the components required is IC7400. All the information about this particular component is stored in Part library files
The part library consists of 3 separate but cross-referenced libraries one each for the part descriptions (*.PART), symbols (*.SYMBOL) and packages (*.PACKAGE). The data in the part description stores the information that four gates of 7400 require a 2 input NAND symbol for graphical representation in the diagram (Schematic components), that a 14-pin DIP package is needed to represent this component on the PCB Layout. The part will also contain Pin out information, i.e. information about which pin in Schematic refers to which pin in PCB footprint. These are needed to front annotate circuit components from diagram to PCB Layout – to automatically generate Layout components
A typical example of components placed in Schematic and Layout editor is shown in Fig 1.5. When the components in the circuit are created, all necessary library elements are loaded from part libraries on disk files and appended to the Project library (local library) within the project. Each new instance of the same type of component requires only a reference to the library elements, i.e. even if there are say 15 NAND gates in the project, the Project Library will contain only one instance. This means that even if several identical components are used in the circuit – they all refer to the same set of library elements in the project (local library).
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